Contact / Report an issue

uvm event callback examples

uvm_event_callback examples


This section provides examples of,
  • Registering two callbacks to the same event
  • Disable the event trigger from pre_trigger
  • Registering callbacks to the event in a test case

Registering two callbacks to the same event


This example is a continuation of the previous example, in this example two callbacks event_callback_0 and event_callback_1 is registered to the same event ev_ab.

//Declaring the event callback classes
event_callback_0 ev_cb_0;
event_callback_1 ev_cb_1;

//Creating the objects
ev_cb_0 = new("ev_cb_0");
ev_cb_1 = new("ev_cb_1");

//Registering callbacks with an event ev
ev.add_callback(ev_cb_0);
ev.add_callback(ev_cb_1);

Complete comp_a code


class component_a extends uvm_component; 
  
  `uvm_component_utils(component_a)
  
  uvm_event        ev;
  event_callback_0 ev_cb_0;
  event_callback_1 ev_cb_1;
  
  //--------------------------------------- 
  // Constructor
  //---------------------------------------
  function new(string name, uvm_component parent);
    super.new(name, parent);
  endfunction : new

  //---------------------------------------
  // run_phase 
  //---------------------------------------
  virtual task run_phase(uvm_phase phase);
    phase.raise_objection(this);
    ev_cb_0 = new("ev_cb_0");
    ev_cb_1 = new("ev_cb_1");
    
    ev = uvm_event_pool::get_global("ev_ab");
    ev.add_callback(ev_cb_0);
    ev.add_callback(ev_cb_1);
    
    `uvm_info(get_type_name(),$sformatf(" Before triggering the event"),UVM_LOW)
    #10;
    
    ev.trigger();
    
    `uvm_info(get_type_name(),$sformatf(" After triggering the event"),UVM_LOW)

    phase.drop_objection(this);
  endtask : run_phase

endclass : component_a

 Simulator Output 

UVM_INFO @ 0: reporter [RNTST] Running test basic_test...
--------------------------------------
Name Type Size Value
--------------------------------------
uvm_test_top basic_test - @335
comp_a component_a - @348
comp_b component_b - @357
--------------------------------------
UVM_INFO component_a.sv(32) @ 0: uvm_test_top.comp_a [component_a] Before triggering the event
UVM_INFO component_b.sv(26) @ 0: uvm_test_top.comp_b [component_b] waiting for the event trigger
UVM_INFO event_callback_0.sv(17) @ 10: reporter [event_callback_0] [Callback-0] Inside event pre_trigger callback
UVM_INFO event_callback_1.sv(17) @ 10: reporter [event_callback_1] [Callback-1] Inside event pre_trigger callback
UVM_INFO event_callback_0.sv(24) @ 10: reporter [event_callback_0] [Callback-0] Inside event post_trigger callback
UVM_INFO event_callback_1.sv(24) @ 10: reporter [event_callback_1] [Callback-1] Inside event post_trigger callback
UVM_INFO component_a.sv(37) @ 10: uvm_test_top.comp_a [component_a] After triggering the event
UVM_INFO component_b.sv(30) @ 10: uvm_test_top.comp_b [component_b] event got triggerd
UVM_INFO /apps/vcsmx/etc/uvm-1.2/src/base/uvm_objection.svh(1270) @ 10: reporter [TEST_DONE]
UVM_INFO /apps/vcsmx/etc/uvm-1.2/src/base/uvm_report_server.svh(847) @ 10: reporter [UVM/REPORT/SERVER]

Execute the above code on 

Disable the event trigger from pre_trigger


In this example, the pre_trigger method returns the value '1', which will lead to disabling event_trigger. which leads to comp_b keep waiting for the event trigger.

pre_trigger method code


  virtual function bit pre_trigger(uvm_event e,uvm_object data);
    `uvm_info(get_type_name(),$sformatf(" [Callback] Inside event pre_trigger callback"),UVM_LOW)
    return 1;
  endfunction

 Simulator Output 

UVM_INFO @ 0: reporter [RNTST] Running test basic_test...
--------------------------------------
Name Type Size Value
--------------------------------------
uvm_test_top basic_test - @335
comp_a component_a - @348
comp_b component_b - @357
--------------------------------------
UVM_INFO component_a.sv(29) @ 0: uvm_test_top.comp_a [component_a] Before triggering the event
UVM_INFO component_b.sv(26) @ 0: uvm_test_top.comp_b [component_b] waiting for the event trigger
UVM_INFO event_callback.sv(17) @ 10: reporter [event_callback] [Callback] Inside event pre_trigger callback
UVM_INFO component_a.sv(34) @ 10: uvm_test_top.comp_a [component_a] After triggering the event
UVM_FATAL /apps/vcsmx/etc/uvm-1.2/src/base/uvm_phase.svh(1489) @ 9200000000000: reporter [PH_TIMEOUT]
Default timeout of 9200000000000 hit, indicating a probable testbench issue
UVM_INFO /apps/vcsmx/etc/uvm-1.2/src/base/uvm_report_server.svh(847) @ 9200000000000: reporter [UVM/REPORT/SERVER]

Execute the above code on 




Registering callbacks to the event in a test case


This example is a modification of the previous examples. In the previous examples, the event callback creation and registering with the event was done in the comp_a.

But in realtime use cases, it is required to create and register to an event from the test case, this example shows the registering callbacks to the event in a test case.

test case code


class basic_test extends uvm_test;

  `uvm_component_utils(basic_test)

  event_callback ev_cb; //Step-1: Declaring the event callback
  uvm_event      ev;
   
  //---------------------------------------
  // Components Instantiation
  //---------------------------------------
  component_a comp_a;
  component_b comp_b;

  //---------------------------------------
  // Constructor
  //---------------------------------------
  function new(string name = "basic_test",uvm_component parent=null);
    super.new(name,parent);
  endfunction : new

  //---------------------------------------
  // build_phase
  //---------------------------------------
  virtual function void build_phase(uvm_phase phase);
    super.build_phase(phase);

    comp_a = component_a::type_id::create("comp_a", this);
    comp_b = component_b::type_id::create("comp_b", this);
    
    //Step-2. Creating the event callback
    ev_cb = new("ev_cb");
    
    ev = uvm_event_pool::get_global("ev_ab");

    //Step-3. Registering callback with event
    ev.add_callback(ev_cb);
  endfunction : build_phase
  
  //---------------------------------------
  // end_of_elobaration phase
  //---------------------------------------  
  virtual function void end_of_elaboration();
    //print's the topology
    print();
  endfunction
endclass : basic_test

 Simulator Output 

UVM_INFO @ 0: reporter [RNTST] Running test basic_test...
--------------------------------------
Name Type Size Value
--------------------------------------
uvm_test_top basic_test - @335
comp_a component_a - @348
comp_b component_b - @357
--------------------------------------
UVM_INFO component_a.sv(26) @ 0: uvm_test_top.comp_a [component_a] Before triggering the event
UVM_INFO component_b.sv(26) @ 0: uvm_test_top.comp_b [component_b] waiting for the event trigger
UVM_INFO event_callback.sv(17) @ 10: reporter [event_callback] [Callback] Inside event pre_trigger callback
UVM_INFO event_callback.sv(24) @ 10: reporter [event_callback] [Callback] Inside event post_trigger callback
UVM_INFO component_a.sv(31) @ 10: uvm_test_top.comp_a [component_a] After triggering the event
UVM_INFO component_b.sv(30) @ 10: uvm_test_top.comp_b [component_b] event got triggerd
UVM_INFO /apps/vcsmx/etc/uvm-1.2/src/base/uvm_objection.svh(1270) @ 10: reporter [TEST_DONE]
UVM_INFO /apps/vcsmx/etc/uvm-1.2/src/base/uvm_report_server.svh(847) @ 10: reporter [UVM/REPORT/SERVER]

Execute the above code on