SystemVerilog Modport

 Modport 


Modport groups and specifies the port directions to the wires/signals declared within in the interface.
By specifying the port directions, modport provides access restrictions.

For example,
For the wire declared as input, assigning any value to that wire is not allowed.

The keyword modport indicates that the directions are declared as inside the module.

interface my_intf;
  logic a;
  logic b;
  
  //modport delcaration
  modport driver  (input a, output b);
  modport monitor (input a, input  b);

endinterface

The Interface can have any number of modports, wire declared in the interface can be grouped in many modports.

wires declared in the modport are accessed as,
   modport_name.wire; 
         or  
 interface_name.modport_name.wire;